The present invention relates to termination resistors. More particularly, the present invention relates to an improved voltage variable material (“VVM”) that is employed additionally as a termination resistor.
Electrical overstress transients (“EOS transients”) produce high electric fields and high peak powers that can render circuits, or the highly sensitive electrical components in the circuits, temporarily or permanently non-functional. EOS transients can include transient voltages or current conditions capable of interrupting circuit operation or destroying the circuit outright. EOS transients may arise, for example, from an electromagnetic pulse, an electrostatic discharge, e.g., from a device or a human body, lightning, a build up of static electricity or be induced by the operation of other electronic or electrical components. An EOS transient can rise to its maximum amplitude in subnanosecond to microsecond times and have repeating amplitude peaks.
The peak amplitude of the electrostatic discharge (“ESD”) transient wave may exceed 25,000 volts with currents of more than 100 amperes. There exist several standards which define the waveform of the EOS transient. These include IEC 61000-4-2, ANSI guidelines on ESD (ANSI C63.16), DO-160, and FAA-20-136. There also exist military standards, such as MIL STD 883 part 3015.
Materials exist for the protection against EOS transients (“EOS materials”), which are designed to rapidly respond (i.e., ideally before the transient wave reaches its peak) to reduce the transmitted voltage to a much lower value and clamp the voltage at the lower value for the duration of the EOS transient. EOS materials are characterized by having high electrical impedance values at low or normal operating voltages. In response to an EOS transient, the materials switch essentially instantaneously to a low electrical impedance state. When the EOS threat has been mitigated these materials return to their high impedance state. These materials are capable of repeated switching between the high and low impedance states, allowing circuit protection against multiple EOS events.
EOS materials also recover essentially instantaneously to their original high impedance value upon termination of the EOS transient. EOS materials can switch to the low impedance state thousands of times, withstanding thousands of ESD events, and recover to the high impedance state after providing protection from each of the individual ESD events.
Circuit components utilizing EOS materials can shunt a portion of the excessive voltage or current due to the EOS transient to ground, protecting the electrical circuit and its components. The major portion of the threat transient, however, is reflected back towards the source of the threat. The reflected wave is either attenuated by the source, radiated away, or re-directed back to the surge protection device which responds to each return pulse until the threat energy is reduced to safe levels.
One voltage variable material or composition for providing protection against electrical overstress is disclosed in U.S. Pat. No. 6,251,513 B1, entitled, “Polymer Composites for Overvoltage Protection”, assigned to the assignee of this invention, the teachings of which are incorporated herein by reference. Other voltage variable materials, the teachings of which are incorporated herein by reference, include the following.
U.S. Pat. No. 2,273,704, issued to Grisdale, discloses granular composites which exhibit non-linear current/voltage relationships. These mixtures are comprised of conductive and semiconductive granules that are coated with a thin insulative layer and are compressed and bonded together to provide a coherent body.
U.S. Pat. No. 2,796,505, issued to Bocciarelli, discloses a non-linear voltage regulating element. The element is comprised of conductor particles having insulative oxide surface coatings that are bound in a matrix. The particles are irregular in shape and make point contact with one another.
U.S. Pat. No. 4,726,991 issued to Hyatt et al., discloses an EOS protection material comprised of a mixture of conductive and semiconductive particles, all of whose surfaces are coated with an insulative oxide film. These particles are bound together in an insulative binder. The coated particles are preferably in point contact with each other and conduct preferentially in a quantum mechanical tunneling mode.
U.S. Pat. No. 5,476,714, issued to Hyatt, discloses EOS composite materials comprised of mixtures of conductive and semiconductive particles sized to be in a 10 to 100 micron range. The materials also include a proportion of insulative particles. All of these materials are bonded together in an insulative binder. This invention includes a grading of particle sizes such that the composition causes the particles to take a preferential relationship to each other.
U.S. Pat. No. 5,260,848, issued to Childers, discloses foldback switching materials which provide protection from transient overvoltages. These materials are comprised of mixtures of conductive particles in the 10 to 200 micron range. Semiconductor and insulative particles are also employed in these compositions. The spacing between conductive particles is at least 1000 angstroms.
Additional EOS polymer composite materials are also disclosed in U.S. Pat. Nos. 4,331,948, 4,726,991, 4,977,357, 4,992,333, 5,142,263, 5,189,387, 5,294,374, 5,476,714, 5,669,381 and 5,781,395, the teachings of which are specifically incorporated herein by reference.
Data communication circuits often require the use of resistors to perform termination, impedance matching, pull-up or pull-down functions. These techniques are well known and are applied in a wide variety of serial and parallel data bus architectures. These resistors commonly take the form of discrete components or arrays of multiple resistors which may be mounted to a printed circuit board (“PCB”), wherein the PCB also holds data transmission receiver and transmitter circuitry. It is this circuitry that is often the most vulnerable to the damaging effects of ESD, since it is connected to the outside environment by a bus or metallic conductors that are used for data transmission.
A common technique to protect the circuitry against ESD damage is the use of discrete ESD suppressors or arrays of multiple suppressors mounted on the PCB. The suppressors are electrically connected from the data lines to system ground or a voltage supply line. In many cases, the suppressors can be connected in parallel with the aforementioned resistors since they are themselves connected between the data lines and system ground or the voltage supply line.
One problem with connecting the suppressors in parallel with the resistors is that the resistors and suppressors consume valuable space on the PCB, which adds to system size and cost. Another problem involves the circuit board traces that interconnect termination resistors, suppressors, data lines, and system ground or supply lines. At high frequency and data rates, these traces can introduce parasitic impedance effects, which can degrade suppressor effectiveness and data signal integrity.
As mentioned earlier, the techniques associated with data line resistors are practiced in spite of the size, cost and interconnection problems. This is due to the essential nature of impedance matching, termination, and logic level pull-up and pull-down functionality in various data transmission schemes.
It would be desirable to have an apparatus and method to combine the transient suppression capability of an EOS or VVM material with the functionality of a data line resistor. This would enable one device or apparatus to perform multiple functions, reduce size and cost of the PCB and enhance performance. The range of resistances required to perform the described data line functions is generally in the range of 50 to 100,000 ohms. Until now, the high impedance of the normal state for known VVM's has been too great by orders of magnitude for this application.